/* * The Clear BSD License * Copyright (c) 2016, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, * are permitted (subject to the limitations in the disclaimer below) provided * that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. * * o Redistributions in binary form must reproduce the above copyright notice, this * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * * o Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Pins v3.0 processor: LPC54018 mcu_data: ksdk2_0 processor_version: 0.0.11 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ #include "fsl_common.h" #include "fsl_iocon.h" #include "pin_mux.h" /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitBootPins * Description : Calls initialization functions. * * END ****************************************************************************************************************/ void BOARD_InitBootPins(void) { BOARD_InitPins(); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPins: - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: B13, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI/CTIMER2_MAT3/SCT0_OUT8/TRACEDATA(2), mode: inactive, invert: disabled, glitch_filter: disabled, slew_rate: standard, open_drain: disabled} - {pin_num: A2, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_30/FC0_TXD_SCL_MISO/CTIMER0_MAT0/SCT0_OUT9/TRACEDATA(1), mode: inactive, invert: disabled, glitch_filter: disabled, slew_rate: standard, open_drain: disabled} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ /* Function assigned for the Core #0 (ARM Cortex-M4) */ void BOARD_InitPins(void) { /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */ CLOCK_EnableClock(kCLOCK_Iocon); const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI */ IOCON_PIO_FUNC1 | /* No addition pin function */ IOCON_PIO_MODE_INACT | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Input filter disabled */ IOCON_PIO_INPFILT_OFF | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN29 (coords: B13) is configured as FC0_RXD_SDA_MOSI */ IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config); const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO */ IOCON_PIO_FUNC1 | /* No addition pin function */ IOCON_PIO_MODE_INACT | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Input filter disabled */ IOCON_PIO_INPFILT_OFF | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN30 (coords: A2) is configured as FC0_TXD_SCL_MISO */ IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config); } /*********************************************************************************************************************** * EOF **********************************************************************************************************************/