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HEHEH!E}CEHUEAHѺy Hb` HH=:IHUEH։t/H-` H#H=:EhHE(HHEUPUHEP_ HEPHE@HHHEHPHEH7EEHEH@H2E^E}EHMdH3 %(tf.fAWAVIAUATL%NI UH-NI SAIL)HHgHt 1LLDAHH9uH[]A\A]A^A_Ðf.HH slot_id(%d) >= %dType FpgaImageSlot VendorId DeviceId DBDFAFIDEVICE%-10s %2u 0x%04x 0x%04x %04x:%02x:%02x.%d %-10s unknown unknown unknown fpga_local_cmd.cinfoType FpgaImageSlot FpgaImageId StatusName StatusCode ErrorName ErrorCode ShVersionnoneAFI%-10s %2u %-22shardware-busyinternal-errorafi-command-malformedunresponsivesoftware-problempci-device-missingdram-data-retention-setup-faileddram-data-retention-faileddram-data-retention-not-possibleafi-power-violationshell-version-not-supportedunspecified-errorcl-ddr-calib-failedcl-id-mismatchinvalid-afi-cmd-api-versioninvalid-afi-idbusyokload-failednot-programmedclearedloaded %-8s %2d %-8s %2d 0x%08x cli_rescan_slot_app_pfs failedfpga_pci_get_slot_spec failedcli_show_slot_app_pfs failedMetricssdacl-slave-timeout=%u virtual-jtag-slave-timeout=%u ocl-slave-timeout=%u bar1-slave-timeout=%u dma-pcis-timeout=%u pcim-range-error=%u pcim-axi-protocol-error=%u dma-range-error=%u pcim-axi-protocol-4K-cross-error=%u pcim-axi-protocol-bus-master-enable-error=%u pcim-axi-protocol-request-size-error=%u pcim-axi-protocol-write-incomplete-error=%u pcim-axi-protocol-first-byte-enable-error=%u pcim-axi-protocol-last-byte-enable-error=%u pcim-axi-protocol-bready-error=%u pcim-axi-protocol-rready-error=%u pcim-axi-protocol-wchannel-error=%u sdacl-slave-timeout-addr=0x%x sdacl-slave-timeout-count=%u virtual-jtag-slave-timeout-addr=0x%x virtual-jtag-slave-timeout-count=%u ocl-slave-timeout-addr=0x%lx ocl-slave-timeout-count=%u bar1-slave-timeout-addr=0x%lx bar1-slave-timeout-count=%u dma-pcis-timeout-addr=0x%lx dma-pcis-timeout-count=%u pcim-range-error-addr=0x%lx pcim-range-error-count=%u pcim-axi-protocol-error-addr=0x%lx pcim-axi-protocol-error-count=%u pcim-write-count=%lu pcim-read-count=%lu DDR%u write-count=%lu read-count=%lu Clock Group A Frequency (Mhz)%lu Clock Group B Frequency (Mhz) Clock Group C Frequency (Mhz)Power consumption (Vccint): Last measured: %lu watts Average: %lu watts Max measured: %lu watts Cached agfis: agfi-0%016lx fpga_mgmt_init failedfpga_mgmt_load_local_image failedfpga_mgmt_load_local_image_sync failedcli_show_image_info failedfpga_mgmt_clear_local_image failedfpga_mgmt_clear_local_image_sync failedfpga_mgmt_describe_local_image failedStarting Virtual JTAG XVC Server for FPGA slot id %u, listening to TCP port %s. Press CTRL-C to stop the service.Error trying to get virtual LED stateFPGA slot id %u have the following Virtual LED: Error: can not get virtual DIP Switch stateFPGA slot id %u has the following Virtual DIP Switches: Error trying to set virtual DIP Switch Invalid opcode %uAction not defined for opcode %ucli_create failedfpga-local-cmd(%u)log_init failedError: Please prefix the command with 'sudo' or login as root%sparse_args failedcli_attach failedcli_main failedError: (%d) %s cli_show_image_info  SYNOPSIS fpga-local-cmd [GENERAL OPTIONS] [-h] DESCRIPTION This program is normally executed via the wrapper scripts. See fpga-load-local-image, fpga-clear-local-image, fpga-describe-local-image, fpga-describe-local-image-slots. fpga-start-virtual-jtag, fpga-get-virtual-led fpga-get-virtual-dip-switch, fpga-set-virtual-dip-switch GENERAL OPTIONS LoadFpgaImage, ClearFpgaImage, DescribeFpgaImage, DescribeFpgaImageSlots, StartVirtualJtag, GetVirtualLED, GetVirtualDIP, SetVirtualDIP fpga-describe-local-image-slots [GENERAL OPTIONS] [-h] Example: fpga-describe-local-image-slots Returns the FPGA image slot numbers and device mappings to use for the fpga-load-local-image, fpga-clear-local-image, and fpga-describe-local-image commands. -h, --help Display this help. -H, --headers Display column headers. -V, --version Display version number of this program. --request-timeout TIMEOUT Specify a request timeout TIMEOUT (in seconds). -M, --show-mbox Show the mbox physical function in the list of devices. fpga-describe-local-image [GENERAL OPTIONS] [-h] Example: fpga-describe-local-image -S 0 Returns the status of the FPGA image for a specified FPGA image slot number. The fpga-image-slot parameter is a logical index that represents a given FPGA within an instance. Use fpga-describe-local-image-slots to return the available FPGA image slots for the instance. -S, --fpga-image-slot The logical slot number for the FPGA image. Constraints: Positive integer from 0 to the total slots minus 1. -M --metrics Return FPGA image hardware metrics. Examples: FPGA PCI and DDR metrics. -C --clear-metrics Return FPGA image hardware metrics (clear on read). -R --rescan Rescan the AFIDEVICE to update the per-AFI PCI VendorId and DeviceId that may be dynamically modified due to a fpga-load-local-image or fpga-clear-local-image command. NOTE1: this option removes the AFIDEVICE from the sysfs PCI subsystem and then rescans the PCI subsystem in order for the modified AFI PCI IDs to be refreshed. NOTE2: it is the developer's responsibility to remove any driver previously installed on the older PCIe VendorId and DeviceId before fpga-clear-local-image, fpga-load-local-image, or re-scan. fpga-load-local-image [GENERAL OPTIONS] [-h] Example: fpga-load-local-image -S 0 -I Loads the specified FPGA image to the specified slot number, and returns the status of the command. The fpga-image-slot parameter is a logical index that represents a given FPGA within an instance. Use fpga-describe-local-image to return the FPGA image status, and fpga-describe-local-image-slots to return the available FPGA image slots for the instance. NOTE: By default, this command automatically rescans the AFIDEVICE to update the per-AFI PCI VendorId and DeviceId that may be dynamically modified during each FPGA image load. The rescan operation removes the AFIDEVICE from the sysfs PCI subsystem and then rescans the PCI subsystem in order for the modified AFI PCI IDs to be refreshed. It is the developer's responsibility to remove any driver previously installed on the older PCIe VendorId and DeviceId before the FPGA image is loaded. The logical slot number for the FPGA image -I, --fpga-image-id The ID of the FPGA image. agfi- -A, --async The default mode of operation is synchronous FPGA image load with automatic rescan. The --async option may be specfied for asynchronous FPGA image load completion, which may be polled for completion using fpga-describe-local-image. --sync-timeout TIMEOUT Specify a timeout TIMEOUT (in seconds) for the sequence of operations that are performed in the synchronous (blocking) mode. -F, --force-shell-reload Reload the FPGA shell on AFI load, even if the next AFI doesn't require it. -a, --clock-a0-freq Request the clock a0 frequency be set to this value in Mhz or less, setting other frequencies in clock group a much slower. -b, --clock-b0-freq Request the clock b0 frequency be set to this value in Mhz or less, setting other frequencies in clock group b much slower. -c, --clock-c0-freq Request the clock c0 frequency be set to this value in Mhz or less, setting other frequencies in clock group c much slower. -D, --dram-data-retention Request that dram data retention be performed for this afi load. This will try to detect if retention is possible and reject the load if it is not. To use, call load with another afi already loaded. -P, --prefetch-image Prefetch the indicated AFI and store it in the cache for faster loading. Fastest load times can be achieved by using cached AFIs and enabling data retention (-D). See Reducing AFI load times documentation. fpga-clear-local-image [GENERAL OPTIONS] [-h] Example: fpga-clear-local-image -S 0 Clears the specified FPGA image slot, including FPGA internal and external memories that are used by the slot. The fpga-image-slot parameter is a logical index that represents a given FPGA within an instance. to update the default AFI PCI VendorId and DeviceId that are dynamically modified during each FPGA image clear. and DeviceId before the FPGA image is cleared. The default mode of operation is synchronous FPGA image clear for asynchronous FPGA image clear completion, which may be mode fpga-start-virtual-jtag [GENERAL OPTIONS] [-h] Example: fpga-start-virtual-jtag -S 0 [-P ] Start Virtual JTAG spplication server, running Xilinx's Virtual Cable (XVC) service, which listens incoming command over TCP port that is set by -P option (Default TCP port is 10201). The fpga-image-slot parameter is a logical index that represents a given FPGA within an instance. This command will work only if AFI is in READY state: fpga-describe-local-image-slots to return the AFI state. The AFI should have included Xilinx's VIO/LIA debug cores and AWS CL Debug Bridge inside the CustomLogic (CL) Concurrent debug of multiple FPGA slots is possible as long as different values are used for each slot. Linux firewall and/or EC2 Network Security Group rules may need to change for enabling inbound access to the TCP port. -P, --tcp-port The TCP port number to use for virtual jtag server, default TCP port is 10201. Remember to use different TCP port for different slot if debugging multiple slots concurrently fpga-get-virtual-led [GENERAL OPTIONS] [-h] Example: fpga-get-virtual-led -S 0 Returns the current status of the virtual LED exposed by the AFI, a series of 0 (zeros) and 1 (ones), first digit from the righti maps to cl_sh_vled[0]. For example, a return value 0000000001000000 indicates that cl_sh_vled[6] is set(on) fpga-get-virtual-dip-switch [GENERAL OPTIONS] [-h] Example: fpga-get-virtual-dip-switch -S 0 Returns the current status of the virtual DIP Switches by driven to the AFI. A series of 0 (Zeros) and 1 (ones) First digit from the right maps to sh_cl_vdip[0] For example, a return value 0000000001000000 indicates that sh_cl_vdip[6] is set(on) fpga-set-virtual-dip-switch [GENERAL OPTIONS] [-h] Example: fpga-set-virtual-dip-switch -S 0 -D 0101000011000000 Drive the AFI in a given slot with the specified virtual DIP Switches A 16 digit value is require: a series of 0 (zeros) and 1 (ones) For example, a value 0101000011000000 indicates that sh_cl_vdip[6], [7], [12], and [14] is set/on -D, --virtual-dip A 16 digit bitmap representation of the desired setting for Virtual DIP Switches This argument is mandatory and must be 16 digits made of any combinations of zeros or ones.1.4.22AFI Management Tools Version: %s Error: The timeout must be between %zu and %zu secondsSetting timeout to %u secs, request_timeout=%u, request_delay_msec=%uSetting timeout to %u secs, sync_timeout=%u, sync_delay_msec=%ufpga-image-slot must be less than %ufpga-image-id must be less than %u bytesRequested frequency must be positiveCould not configure the request-timeoutCould not configure the sync-timeoutS:I:r:s:a:b:c:AH?hVFDPzűűűűƯűűűűűűűű|űűűűűűűűűűűű,pűűűűűűűűűűűűűű;S:r:s:AH?hVҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲҲ-pS:MCr:RH?hV;/Kr:H?hVMtcp-port must be less than %utcp-port must be larger than %uS:P:RH?hVError: Invalid Slot Id !S:RH?hVvirtual-dip must be 16 digits of zero or oneillegal digit for virtual-dip %cS:D:RH?hVError: Missing DIP Switch values !Error: opcode string must be specifiedError: program name or opcode string is NULLfpga-image-slotfpga-image-idclock-a0-freqclock-b0-freqclock-c0-freqrequest-timeoutsync-timeoutasyncheadershelpversionforce-shell-reloaddram-data-retentionprefetch-imagemetricsclear-metricsrescanshow-mboxtcp-portvirtual-dipLoadFpgaImageClearFpgaImageDescribeFpgaImageSlotsDescribeFpgaImageStartVirtualJtagGetVirtualLEDGetVirtualDIPSetVirtualDIP  getaddrinfo: %s virtual_jtag_server.clen <= c->buf_lenprotocol error: received %.30s getinfo:xvcServer_v%u.%u:%u shift:p + 4 + bytes * 2 - cbuf <= c->buf_maxProblemsettck:protocol error: received %.*s XVC connection terminated: error %d setsockopt TCP_NODELAY failed open Virtual JTAG over PCIe failed consume_packetread_packet;5d$t~<׎\ |fɛٛ<\|[ߡc3<\|Q6<\|ڬ1<\|5Kb<y\[|#<DzRx +zRx $FJ w?;*3$"D8\:YAC T |s6AC 1 Y AC T ˜cAC ^ AC K AC  AC  <y AC  \eAC  |6IAC D _xAC s AC  AC  ;AC v AC  <uAC p \d AC F |O AC F :AC  YAC T NAC I AC Z AC Z <AC  \AC  |]?AC : |AC  6AC  ɨ-AC ( ֩AC  ;AC 6 <Ҭ;AC 6 \RAC M |6AC 1 5DAC  YAC Y WAC U QAC  GAC  <ճiAC d \AC R |AC  ׵NAC I =AC x "5AC p 7zAC u AC  <AC  D\eBBE B(H0H8M@r8A0A(B BBB:p:HIJKLMNN 5 rp x o  Q  / oooo2oW 55566&666F6V6f6v66666666677&767F7V7f7v77777777788&868F8V8f8v88888888899&969F9V9f9v999 10201+@8v(h+(vRcЃ(bx+(p@vdHvH·0pHȉHRcЃ(x+8Ћ i، XPvdȎJ`8RcЃ(y)@`0r"@ؓHhЕ@+pGЋ i`XPvdJ h8RcЃ(y+8șXЋ@țPvdȎ8RcЃ+8ОvdȎRcЃ@+p(`vdȎRcЃР+hvdȎ"@RcЃSI˨a٨bcrsAH h%V-F@DTPSrsAH h%VScMkCryRH h%VrH h%VMSPH h%VSH h%VSH h%VSDH h%VSM  EM logOg  #mM $$;9 #mg $ $S | 4  4  4 ;  gv>n  !xK Mz Oz ?Qz Rz Sz U ZzT .[zX >]z\ B^z` t`6d b6e  d6f hf6g g6h i6i k6j m6k "o6l q6m U son )up%f1x &1 r}05a  6 $7 8 9 : ;( &}>a r' +  (3  ),   *m B +" .  , mOi-*m\-;^P.retmd/errQ0.QP+ h1b umO 1imO 1RmoOu2 @mN/errGhO2 #mN;(.ret%ml2 mNi+9ob.retmd2mM+9ob.retmd2) mMx-9o\.iml1 mLI2I mKh.imx.retmx+ hx/errL Mx B2mJ .retmz+zz+ z/errK2itmI@.retvmz/errJ00J+| z2 ImH.retKmr.optL w+Nzr/erriI0,I+_ r1=mH2mGc5.ret ml/out0G/err2G3 kmI<Y 4k~5.* p& oM~6retpm~6iqz~&3 r~&x~/errG0U@*6fmc/~0Dx&a5~ * BC3 @m;64@m\4 @P7err^D;&S J6c6iKmd0u;& MhM8:Y9fmt~:l Qhx  zs'4intg);wM t tCBR oT RUVU(vX -xb y; Ozb |; ub P P 2  (C YE #F Gt  B' H_r6 b  6  ` M(0 8@AH5 PXn` th bpbt/{x4Ig z.3% - . / 0 2 3b5Un Sn  t b=  B6  B? @At tlt b   $T 2b 7b ;b 2y  4  7b @ 8yval 9bb Wi i ;ɼ }  B?  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