// (c) Copyright 2017 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected under U.S. and // international copyright and other intellectual property // laws. // // DISCLAIMER // This disclaimer is not a license and does not grant any // rights to the materials distributed herewith. Except as // otherwise provided in a valid license issued to you by // Xilinx, and to the maximum extent permitted by applicable // law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND // WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES // AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING // BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- // INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and // (2) Xilinx shall not be liable (whether in contract or tort, // including negligence, or under any other theory of // liability) for any loss or damage of any kind or nature // related to, arising under or in connection with these // materials, including for any direct, or any indirect, // special, incidental, or consequential loss or damage // (including loss of data, profits, goodwill, or any type of // loss or damage suffered as a result of any action brought // by a third party) even if such damage or loss was // reasonably foreseeable or Xilinx had been advised of the // possibility of the same. // // CRITICAL APPLICATIONS // Xilinx products are not designed or intended to be fail- // safe, or for use in any application requiring fail-safe // performance, such as life-support or safety devices or // systems, Class III medical devices, nuclear facilities, // applications related to the deployment of airbags, or any // other applications that could lead to death, personal // injury, or severe property or environmental damage // (individually and collectively, "Critical // Applications"). Customer assumes the sole risk and // liability of any use of Xilinx products in Critical // Applications, subject only to applicable laws and // regulations governing limitations on product liability. // // THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS // PART OF THIS FILE AT ALL TIMES. // // DO NOT MODIFY THIS FILE. // // File: sh_connectors.vh // Static port connections on the instance of cl_wrapper.v .S_SH_clk_main_a0 (clk_main_a0 ), .S_SH_clk_extra_a1 (clk_extra_a1 ), .S_SH_clk_extra_a2 (clk_extra_a2 ), .S_SH_clk_extra_a3 (clk_extra_a3 ), .S_SH_clk_extra_b0 (clk_extra_b0 ), .S_SH_clk_extra_b1 (clk_extra_b1 ), .S_SH_clk_extra_c0 (clk_extra_c0 ), .S_SH_clk_extra_c1 (clk_extra_c1 ), .S_SH_kernel_rst_n (kernel_rst_n ), .S_SH_rst_main_n (rst_main_n ), .S_SH_sh_cl_flr_assert (sh_cl_flr_assert ), .S_SH_cl_sh_flr_done (cl_sh_flr_done ), .S_SH_sh_cl_status_vdip (sh_cl_status_vdip ), .S_SH_cl_sh_status_vled (cl_sh_status_vled ), .S_SH_cl_sh_status0 (cl_sh_status0 ), .S_SH_cl_sh_status1 (cl_sh_status1 ), .S_SH_cl_sh_id0 (cl_sh_id0 ), .S_SH_cl_sh_id1 (cl_sh_id1 ), .S_SH_sh_cl_ctl0 (sh_cl_ctl0 ), .S_SH_sh_cl_ctl1 (sh_cl_ctl1 ), .S_SH_sh_cl_pwr_state (sh_cl_pwr_state ), .S_SH_cl_sh_pcim_awid (cl_sh_pcim_awid ), .S_SH_cl_sh_pcim_awaddr (cl_sh_pcim_awaddr ), .S_SH_cl_sh_pcim_awlen (cl_sh_pcim_awlen ), .S_SH_cl_sh_pcim_awsize (cl_sh_pcim_awsize ), .S_SH_cl_sh_pcim_awuser (cl_sh_pcim_awuser ), .S_SH_cl_sh_pcim_awvalid (cl_sh_pcim_awvalid ), .S_SH_sh_cl_pcim_awready (sh_cl_pcim_awready ), .S_SH_cl_sh_pcim_wdata (cl_sh_pcim_wdata ), .S_SH_cl_sh_pcim_wstrb (cl_sh_pcim_wstrb ), .S_SH_cl_sh_pcim_wlast (cl_sh_pcim_wlast ), .S_SH_cl_sh_pcim_wvalid (cl_sh_pcim_wvalid ), .S_SH_sh_cl_pcim_wready (sh_cl_pcim_wready ), .S_SH_sh_cl_pcim_bid (sh_cl_pcim_bid ), .S_SH_sh_cl_pcim_bresp (sh_cl_pcim_bresp ), .S_SH_sh_cl_pcim_bvalid (sh_cl_pcim_bvalid ), .S_SH_cl_sh_pcim_bready (cl_sh_pcim_bready ), .S_SH_cl_sh_pcim_arid (cl_sh_pcim_arid ), .S_SH_cl_sh_pcim_araddr (cl_sh_pcim_araddr ), .S_SH_cl_sh_pcim_arlen (cl_sh_pcim_arlen ), .S_SH_cl_sh_pcim_arsize (cl_sh_pcim_arsize ), .S_SH_cl_sh_pcim_aruser (cl_sh_pcim_aruser ), .S_SH_cl_sh_pcim_arvalid (cl_sh_pcim_arvalid ), .S_SH_sh_cl_pcim_arready (sh_cl_pcim_arready ), .S_SH_sh_cl_pcim_rid (sh_cl_pcim_rid ), .S_SH_sh_cl_pcim_rdata (sh_cl_pcim_rdata ), .S_SH_sh_cl_pcim_rresp (sh_cl_pcim_rresp ), .S_SH_sh_cl_pcim_rlast (sh_cl_pcim_rlast ), .S_SH_sh_cl_pcim_rvalid (sh_cl_pcim_rvalid ), .S_SH_cl_sh_pcim_rready (cl_sh_pcim_rready ), .S_SH_cfg_max_payload (cfg_max_payload ), .S_SH_cfg_max_read_req (cfg_max_read_req ), .S_SH_clk_300m_dimm0_dp (CLK_300M_DIMM0_DP ), .S_SH_clk_300m_dimm0_dn (CLK_300M_DIMM0_DN ), .S_SH_m_a_act_n (M_A_ACT_N ), .S_SH_m_a_ma (M_A_MA ), .S_SH_m_a_ba (M_A_BA ), .S_SH_m_a_bg (M_A_BG ), .S_SH_m_a_cke (M_A_CKE ), .S_SH_m_a_odt (M_A_ODT ), .S_SH_m_a_cs_n (M_A_CS_N ), .S_SH_m_a_clk_dn (M_A_CLK_DN ), .S_SH_m_a_clk_dp (M_A_CLK_DP ), .S_SH_m_a_par (M_A_PAR ), .S_SH_m_a_dq (M_A_DQ ), .S_SH_m_a_ecc (M_A_ECC ), .S_SH_m_a_dqs_dp (M_A_DQS_DP ), .S_SH_m_a_dqs_dn (M_A_DQS_DN ), .S_SH_cl_rst_dimm_a_n (cl_RST_DIMM_A_N ), .S_SH_clk_300m_dimm1_dp (CLK_300M_DIMM1_DP ), .S_SH_clk_300m_dimm1_dn (CLK_300M_DIMM1_DN ), .S_SH_m_b_act_n (M_B_ACT_N ), .S_SH_m_b_ma (M_B_MA ), .S_SH_m_b_ba (M_B_BA ), .S_SH_m_b_bg (M_B_BG ), .S_SH_m_b_cke (M_B_CKE ), .S_SH_m_b_odt (M_B_ODT ), .S_SH_m_b_cs_n (M_B_CS_N ), .S_SH_m_b_clk_dn (M_B_CLK_DN ), .S_SH_m_b_clk_dp (M_B_CLK_DP ), .S_SH_m_b_par (M_B_PAR ), .S_SH_m_b_dq (M_B_DQ ), .S_SH_m_b_ecc (M_B_ECC ), .S_SH_m_b_dqs_dp (M_B_DQS_DP ), .S_SH_m_b_dqs_dn (M_B_DQS_DN ), .S_SH_cl_rst_dimm_b_n (cl_RST_DIMM_B_N ), .S_SH_clk_300m_dimm3_dp (CLK_300M_DIMM3_DP ), .S_SH_clk_300m_dimm3_dn (CLK_300M_DIMM3_DN ), .S_SH_m_d_act_n (M_D_ACT_N ), .S_SH_m_d_ma (M_D_MA ), .S_SH_m_d_ba (M_D_BA ), .S_SH_m_d_bg (M_D_BG ), .S_SH_m_d_cke (M_D_CKE ), .S_SH_m_d_odt (M_D_ODT ), .S_SH_m_d_cs_n (M_D_CS_N ), .S_SH_m_d_clk_dn (M_D_CLK_DN ), .S_SH_m_d_clk_dp (M_D_CLK_DP ), .S_SH_m_d_par (M_D_PAR ), .S_SH_m_d_dq (M_D_DQ ), .S_SH_m_d_ecc (M_D_ECC ), .S_SH_m_d_dqs_dp (M_D_DQS_DP ), .S_SH_m_d_dqs_dn (M_D_DQS_DN ), .S_SH_cl_rst_dimm_d_n (cl_RST_DIMM_D_N ), .S_SH_sh_ddr_stat_addr0 (sh_ddr_stat_addr0 ), .S_SH_sh_ddr_stat_wr0 (sh_ddr_stat_wr0 ), .S_SH_sh_ddr_stat_rd0 (sh_ddr_stat_rd0 ), .S_SH_sh_ddr_stat_wdata0 (sh_ddr_stat_wdata0 ), .S_SH_ddr_sh_stat_ack0 (ddr_sh_stat_ack0 ), .S_SH_ddr_sh_stat_rdata0 (ddr_sh_stat_rdata0 ), .S_SH_ddr_sh_stat_int0 (ddr_sh_stat_int0 ), .S_SH_sh_ddr_stat_addr1 (sh_ddr_stat_addr1 ), .S_SH_sh_ddr_stat_wr1 (sh_ddr_stat_wr1 ), .S_SH_sh_ddr_stat_rd1 (sh_ddr_stat_rd1 ), .S_SH_sh_ddr_stat_wdata1 (sh_ddr_stat_wdata1 ), .S_SH_ddr_sh_stat_ack1 (ddr_sh_stat_ack1 ), .S_SH_ddr_sh_stat_rdata1 (ddr_sh_stat_rdata1 ), .S_SH_ddr_sh_stat_int1 (ddr_sh_stat_int1 ), .S_SH_sh_ddr_stat_addr2 (sh_ddr_stat_addr2 ), .S_SH_sh_ddr_stat_wr2 (sh_ddr_stat_wr2 ), .S_SH_sh_ddr_stat_rd2 (sh_ddr_stat_rd2 ), .S_SH_sh_ddr_stat_wdata2 (sh_ddr_stat_wdata2 ), .S_SH_ddr_sh_stat_ack2 (ddr_sh_stat_ack2 ), .S_SH_ddr_sh_stat_rdata2 (ddr_sh_stat_rdata2 ), .S_SH_ddr_sh_stat_int2 (ddr_sh_stat_int2 ), .S_SH_cl_sh_ddr_awid (cl_sh_ddr_awid ), .S_SH_cl_sh_ddr_awaddr (cl_sh_ddr_awaddr ), .S_SH_cl_sh_ddr_awlen (cl_sh_ddr_awlen ), .S_SH_cl_sh_ddr_awsize (cl_sh_ddr_awsize ), .S_SH_cl_sh_ddr_awburst (cl_sh_ddr_awburst ), .S_SH_cl_sh_ddr_awvalid (cl_sh_ddr_awvalid ), .S_SH_sh_cl_ddr_awready (sh_cl_ddr_awready ), .S_SH_cl_sh_ddr_wid (cl_sh_ddr_wid ), .S_SH_cl_sh_ddr_wdata (cl_sh_ddr_wdata ), .S_SH_cl_sh_ddr_wstrb (cl_sh_ddr_wstrb ), .S_SH_cl_sh_ddr_wlast (cl_sh_ddr_wlast ), .S_SH_cl_sh_ddr_wvalid (cl_sh_ddr_wvalid ), .S_SH_sh_cl_ddr_wready (sh_cl_ddr_wready ), .S_SH_sh_cl_ddr_bid (sh_cl_ddr_bid ), .S_SH_sh_cl_ddr_bresp (sh_cl_ddr_bresp ), .S_SH_sh_cl_ddr_bvalid (sh_cl_ddr_bvalid ), .S_SH_cl_sh_ddr_bready (cl_sh_ddr_bready ), .S_SH_cl_sh_ddr_arid (cl_sh_ddr_arid ), .S_SH_cl_sh_ddr_araddr (cl_sh_ddr_araddr ), .S_SH_cl_sh_ddr_arlen (cl_sh_ddr_arlen ), .S_SH_cl_sh_ddr_arsize (cl_sh_ddr_arsize ), .S_SH_cl_sh_ddr_arburst (cl_sh_ddr_arburst ), .S_SH_cl_sh_ddr_arvalid (cl_sh_ddr_arvalid ), .S_SH_sh_cl_ddr_arready (sh_cl_ddr_arready ), .S_SH_sh_cl_ddr_rid (sh_cl_ddr_rid ), .S_SH_sh_cl_ddr_rdata (sh_cl_ddr_rdata ), .S_SH_sh_cl_ddr_rresp (sh_cl_ddr_rresp ), .S_SH_sh_cl_ddr_rlast (sh_cl_ddr_rlast ), .S_SH_sh_cl_ddr_rvalid (sh_cl_ddr_rvalid ), .S_SH_cl_sh_ddr_rready (cl_sh_ddr_rready ), .S_SH_sh_cl_ddr_is_ready (sh_cl_ddr_is_ready ), .S_SH_cl_sh_apppf_irq_req (cl_sh_apppf_irq_req ), .S_SH_sh_cl_apppf_irq_ack (sh_cl_apppf_irq_ack ), .S_SH_sh_cl_dma_pcis_awid (sh_cl_dma_pcis_awid ), .S_SH_sh_cl_dma_pcis_awaddr (sh_cl_dma_pcis_awaddr ), .S_SH_sh_cl_dma_pcis_awlen (sh_cl_dma_pcis_awlen ), .S_SH_sh_cl_dma_pcis_awsize (sh_cl_dma_pcis_awsize ), .S_SH_sh_cl_dma_pcis_awvalid (sh_cl_dma_pcis_awvalid ), .S_SH_cl_sh_dma_pcis_awready (cl_sh_dma_pcis_awready ), .S_SH_sh_cl_dma_pcis_wdata (sh_cl_dma_pcis_wdata ), .S_SH_sh_cl_dma_pcis_wstrb (sh_cl_dma_pcis_wstrb ), .S_SH_sh_cl_dma_pcis_wlast (sh_cl_dma_pcis_wlast ), .S_SH_sh_cl_dma_pcis_wvalid (sh_cl_dma_pcis_wvalid ), .S_SH_cl_sh_dma_pcis_wready (cl_sh_dma_pcis_wready ), .S_SH_cl_sh_dma_pcis_bid (cl_sh_dma_pcis_bid ), .S_SH_cl_sh_dma_pcis_bresp (cl_sh_dma_pcis_bresp ), .S_SH_cl_sh_dma_pcis_bvalid (cl_sh_dma_pcis_bvalid ), .S_SH_sh_cl_dma_pcis_bready (sh_cl_dma_pcis_bready ), .S_SH_sh_cl_dma_pcis_arid (sh_cl_dma_pcis_arid ), .S_SH_sh_cl_dma_pcis_araddr (sh_cl_dma_pcis_araddr ), .S_SH_sh_cl_dma_pcis_arlen (sh_cl_dma_pcis_arlen ), .S_SH_sh_cl_dma_pcis_arsize (sh_cl_dma_pcis_arsize ), .S_SH_sh_cl_dma_pcis_arvalid (sh_cl_dma_pcis_arvalid ), .S_SH_cl_sh_dma_pcis_arready (cl_sh_dma_pcis_arready ), .S_SH_cl_sh_dma_pcis_rid (cl_sh_dma_pcis_rid ), .S_SH_cl_sh_dma_pcis_rdata (cl_sh_dma_pcis_rdata ), .S_SH_cl_sh_dma_pcis_rresp (cl_sh_dma_pcis_rresp ), .S_SH_cl_sh_dma_pcis_rlast (cl_sh_dma_pcis_rlast ), .S_SH_cl_sh_dma_pcis_rvalid (cl_sh_dma_pcis_rvalid ), .S_SH_sh_cl_dma_pcis_rready (sh_cl_dma_pcis_rready ), .S_SH_sda_cl_awvalid (sda_cl_awvalid ), .S_SH_sda_cl_awaddr (sda_cl_awaddr ), .S_SH_cl_sda_awready (cl_sda_awready ), .S_SH_sda_cl_wvalid (sda_cl_wvalid ), .S_SH_sda_cl_wdata (sda_cl_wdata ), .S_SH_sda_cl_wstrb (sda_cl_wstrb ), .S_SH_cl_sda_wready (cl_sda_wready ), .S_SH_cl_sda_bvalid (cl_sda_bvalid ), .S_SH_cl_sda_bresp (cl_sda_bresp ), .S_SH_sda_cl_bready (sda_cl_bready ), .S_SH_sda_cl_arvalid (sda_cl_arvalid ), .S_SH_sda_cl_araddr (sda_cl_araddr ), .S_SH_cl_sda_arready (cl_sda_arready ), .S_SH_cl_sda_rvalid (cl_sda_rvalid ), .S_SH_cl_sda_rdata (cl_sda_rdata ), .S_SH_cl_sda_rresp (cl_sda_rresp ), .S_SH_sda_cl_rready (sda_cl_rready ), .S_SH_sh_ocl_awvalid (sh_ocl_awvalid ), .S_SH_sh_ocl_awaddr (sh_ocl_awaddr ), .S_SH_ocl_sh_awready (ocl_sh_awready ), .S_SH_sh_ocl_wvalid (sh_ocl_wvalid ), .S_SH_sh_ocl_wdata (sh_ocl_wdata ), .S_SH_sh_ocl_wstrb (sh_ocl_wstrb ), .S_SH_ocl_sh_wready (ocl_sh_wready ), .S_SH_ocl_sh_bvalid (ocl_sh_bvalid ), .S_SH_ocl_sh_bresp (ocl_sh_bresp ), .S_SH_sh_ocl_bready (sh_ocl_bready ), .S_SH_sh_ocl_arvalid (sh_ocl_arvalid ), .S_SH_sh_ocl_araddr (sh_ocl_araddr ), .S_SH_ocl_sh_arready (ocl_sh_arready ), .S_SH_ocl_sh_rvalid (ocl_sh_rvalid ), .S_SH_ocl_sh_rdata (ocl_sh_rdata ), .S_SH_ocl_sh_rresp (ocl_sh_rresp ), .S_SH_sh_ocl_rready (sh_ocl_rready ), .S_SH_sh_bar1_awvalid (sh_bar1_awvalid ), .S_SH_sh_bar1_awaddr (sh_bar1_awaddr ), .S_SH_bar1_sh_awready (bar1_sh_awready ), .S_SH_sh_bar1_wvalid (sh_bar1_wvalid ), .S_SH_sh_bar1_wdata (sh_bar1_wdata ), .S_SH_sh_bar1_wstrb (sh_bar1_wstrb ), .S_SH_bar1_sh_wready (bar1_sh_wready ), .S_SH_bar1_sh_bvalid (bar1_sh_bvalid ), .S_SH_bar1_sh_bresp (bar1_sh_bresp ), .S_SH_sh_bar1_bready (sh_bar1_bready ), .S_SH_sh_bar1_arvalid (sh_bar1_arvalid ), .S_SH_sh_bar1_araddr (sh_bar1_araddr ), .S_SH_bar1_sh_arready (bar1_sh_arready ), .S_SH_bar1_sh_rvalid (bar1_sh_rvalid ), .S_SH_bar1_sh_rdata (bar1_sh_rdata ), .S_SH_bar1_sh_rresp (bar1_sh_rresp ), .S_SH_sh_bar1_rready (sh_bar1_rready ), .S_SH_sh_cl_glcount0 (sh_cl_glcount0 ), .S_SH_sh_cl_glcount1 (sh_cl_glcount1 ), .S_SH_cl_sh_dma_wr_full (cl_sh_dma_wr_full ), .S_SH_cl_sh_dma_rd_full (cl_sh_dma_rd_full )